{"source":"Breaknorm","page":"https://breaknorm.co/company/sifive.com","license":"https://breaknorm.co/terms","domain":"sifive.com","name":"SiFive","legal_name":"SiFive","country":"US","country_second":"CA","city":"San Mateo","admin1":"California","vertical":"manufacturing_industry","subvertical":"electronics_and_electrical_manufacturing","leaf":"semiconductor_manufacturers","summary":"SiFive is a semiconductor company that designs RISC-V core IP and system IP for AI, ML, automotive, edge computing, IoT, embedded, datacenter, consumer devices, and aerospace & defense markets. Its offerings include the Essential, Intelligence, Performance and Automotive core families, HiFive Premier P550 development boards, and software tools such as Core Designer and Freedom Studio.","offerings":["Essential core family","Intelligence core family","Performance core family","Automotive core family","HiFive Premier P550 board","SiFive Insight","SiFive IOMMU Gen 2","Core Designer software"],"target_customers":["AI and ML","automotive","edge computing","IoT and embedded","datacenter","semiconductor industry","automotive manufacturers","datacenter operators","embedded systems developers"],"business_model":["B2B"],"geo_scope":"international","headcount":"501-1000","headcount_source":"linkedin","revenue":"50M-250M","revenue_source":"estimated","certifications":[],"langs":["en","zh"],"linkedin":"https://www.linkedin.com/company/sifive","reviews":[],"contact_points":4,"contact_phones":3,"page_types":["privacy","pricing","terms","locations","home","contact","careers","services"],"crawled":"2026-08-08","profiled":"2026-08-16","indexed":"2026-09-19","hiring_built":"2026-11-02","website_tech":["apple","atlassian","aws_route_53","dmarcian","docusign","google_workspace","hubspot","knowbe4","microsoft_365","microsoft_entra_id","microsoft_intune","salesforce","sendgrid","smartsheet"],"hiring":{"open":134,"open_postings":134,"new_7d":0,"new_30d":22,"new_90d":69,"closed_30d":0,"countries":["CN","FR","GB","IN","TW","US"]},"hiring_functions":[["engineering_non_software",95,10],["software_engineering",16,6],["sales",4,1],["data_and_ai",2,2],["it_operations_and_business_systems",2,2],["product_program_and_project_management",1,0],["quality_safety_and_environment",1,0]],"tech_jobs":[{"slug":"systemverilog","status":"active","confidence":"high","jobs":62,"first_seen":"2026-04-11","function":"engineering_non_software","quote":"• Testbench Development: Design and implement scalable, reusable, and constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology).","title":"Senior Staff Verification Engineer For Worldguard"},{"slug":"python","status":"active","confidence":"high","jobs":54,"first_seen":"2026-04-09","function":"engineering_non_software","quote":"• Create and support Python-based scripts to enhance and automate debug workflows, and support the integration of ZeBu runtime automation into the SiFive manager ecosystem.","title":"Zebu flow Engineer"},{"slug":"uvm","status":"active","confidence":"high","jobs":38,"first_seen":"2026-04-11","function":"engineering_non_software","quote":"• Architect constrained‑random, coverage‑driven UVM testbenches for:","title":"Staff Design Verification Engineer"},{"slug":"c-plus-plus","status":"active","confidence":"high","jobs":27,"first_seen":"2026-04-09","function":"engineering_non_software","quote":"• Collaborate with colleagues to integrate with MLIR Compiler stack written in C++","title":"Platform Technologies Language & Frontend Design Engineer"},{"slug":"chisel","status":"active","confidence":"high","jobs":30,"first_seen":"2026-04-09","function":"engineering_non_software","quote":"You will be expected to collaborate with Design Verification engineers to develop reusable testbench components and integrate them within SiFive’s Chisel-based Verification Platform..","title":"Staff Design Verification Infrastructure Engineer - VIPs and Testbench"},{"slug":"scala","status":"active","confidence":"high","jobs":28,"first_seen":"2026-04-09","function":"engineering_non_software","quote":"• Develop Verification Platform libraries for expressing verification intent in Scala with Chisel, including test harnesses, stimulus, scoreboards, and other generators","title":"Design Verification Infrastructure Engineer - Platform"},{"slug":"synopsys","status":"active","confidence":"high","jobs":17,"first_seen":"2026-05-20","function":"engineering_non_software","quote":"• ML-Driven Optimization: Lead the integration and scaling of AI/ML optimization tools (e.g., Synopsys DSO.ai) to autonomously navigate the massive PPA design space.","title":"Sr Staff, Physical Design Architect (Flow & ML Automation)"},{"slug":"linux","status":"active","confidence":"high","jobs":13,"first_seen":"2026-04-09","function":"software_engineering","quote":"You’ll work with our software group to design software implementations that take advantage of hardware features and integrate cleanly with existing operating systems, such as Linux.","title":"Staff System Software Engineer"},{"slug":"synopsys-fusion-compiler","status":"active","confidence":"high","jobs":10,"first_seen":"2026-07-09","function":"engineering_non_software","quote":"• Flow Development & Execution: Develop, validate, and deploy production-ready RTL-to-GDS recipes using Synopsys Fusion Compiler","title":"Staff Physical Design Engineer: CPU Implementation & Flow Automation"},{"slug":"tcl","status":"active","confidence":"high","jobs":13,"first_seen":"2026-07-03","function":"engineering_non_software","quote":"• Develop verification environments and infrastructure using Chisel, Scala, and TCL scripting.","title":"Staff Engineer Formal(IOMMU-N)"},{"slug":"mlir","status":"active","confidence":"high","jobs":7,"first_seen":"2026-05-23","function":"","quote":"• Compiler Infrastructure: Develop and maintain MLIR/IREE/Triton compiler stacks; optimize end-to-end (e2e) LLM performance and contribute to relevant open-source communities.","title":"AI/ML Software Engineer"},{"slug":"jira","status":"active","confidence":"high","jobs":17,"first_seen":"2026-04-11","function":"software_engineering","quote":"You'll collaborate with other teams, manage Jira tickets, and make sure everything is tested end-to-end before it hits production.","title":"Full-Stack Staff Engineer"},{"slug":"jtag","status":"active","confidence":"high","jobs":5,"first_seen":"2026-06-17","function":"","quote":"• Facilitate debug using ZeBu features like waveform dumping and utilize ILA and JTAG debuggers to troubleshoot and validate designs.","title":"Zebu flow Engineer"},{"slug":"aws","status":"active","confidence":"high","jobs":2,"first_seen":"2026-08-07","function":"","quote":"• System Integration: Integrate backend services with AWS native tools (e.g., SQS, S3, Lambda) to build highly scalable, decoupled architectures.","title":"Full-Stack Staff Engineer"}],"intents":[],"recent_postings":[{"id":2443849,"title":"Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-27","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Bengaluru-Karnataka-India/Senior-Engineer---CPU-Verification--RISCV-Vector-ALU--FPU-Verification-_R-101489","tech":["systemverilog","uvm","python","c-plus-plus"]},{"id":2443845,"title":"Sr Staff Static Timing Analysis (STA) Lead","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-27","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Bengaluru-Karnataka-India/Senior-Staff-Physical-Design-Architect--Flow---ML-Automation-_R-101081","tech":["synopsys-primetime","sdc"]},{"id":2443844,"title":"Senior Engineer - CPU Verification (ALU, FPU Formal and Datapath Verification)","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-27","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Bengaluru-Karnataka-India/Senior-Engineer---CPU-Verification--ALU--FPU-Formal-and-Datapath-Verification-_R-101488","tech":["systemverilog","python","c-plus-plus"]},{"id":2443817,"title":"Functional Safety & RAS Lead","city":"","function":"quality_safety_and_environment","family":"quality_safety_and_environment/safety_engineering","seniority":"senior","posted":"2026-10-27","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Santa-Clara-California-United-States/Functional-Safety---RAS-Lead_R-101550","tech":[]},{"id":6446000,"title":"Senior Engineer - Physical Design","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-26","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Bengaluru-Karnataka-India/Senior-Engineer---Physical-Design_R-101427","tech":["synopsys","synopsys-fusion-compiler","synopsys-primetime","cadence-design-systems","cadence-tempus"]},{"id":6445999,"title":"In-Order Tile TestBench Design Verification Engineer","city":"","function":"engineering_non_software","family":null,"seniority":"senior","posted":"2026-10-26","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Hyderabad-India/In-Order-Tile-TestBench-Design-Verification-Engineer_R-101254","tech":["uvm","systemverilog"]},{"id":2443874,"title":"Staff Design Verification Engineer","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-26","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Hyderabad-India/Staff-Design-Verification-Engineer_R-101248","tech":["uvm","systemverilog","ibm-tso"]},{"id":2443873,"title":"Senior Engineer - CPU DV","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-26","url":"https://sifive.wd1.myworkdayjobs.com/sifivecareers/job/Hyderabad-India/Senior-Engineer---CPU-DV_R-101273","tech":["systemverilog","uvm"]}],"ats":"Workday","similar":[{"domain":"siliconova.com","name":"SILICONOVA","country":"US","city":"Mirpur TSO","headcount":"51-200","leaf":"electronics_pcb_design_consulting","summary":"SILICONOVA is a semiconductor design engineering service provider that offers RTL design to tape-out, VLSI frontend and backend design, and IT and cloud support."},{"domain":"syntacore.com","name":"Syntacore","country":"US","city":null,"headcount":"51-200","leaf":"semiconductor_manufacturers","summary":"Syntacore is a service provider that develops RISC-V processor IP and tools for businesses and enterprises."},{"domain":"sophon.ai","name":"SophGo","country":"US","city":null,"headcount":"201-500","leaf":"semiconductor_manufacturers","summary":"SophGo is a semiconductor and computing company that designs and manufactures processors, servers and deep-learning modules."},{"domain":"yangtianzi.com","name":"yangtianzi.com","country":"US","city":null,"headcount":"5001-10000","leaf":"semiconductor_manufacturers","summary":"The company is a semiconductor manufacturer that develops, sources, distributes and supports IC products for businesses."},{"domain":"isi-molex.com","name":"ISI","country":"US","city":"Camarillo","headcount":"51-200","leaf":"other_electronics_and_electrical_manufacturing","summary":"ISI is an electronics manufacturer that designs and manufactures electronic systems for aerospace, defense, satcom, datacenter, industrial and transportation ap."},{"domain":"espressif.com","name":"Espressif","country":"CN","city":"Shanghai","headcount":"501-1000","leaf":"semiconductor_manufacturers","summary":"Espressif is a semiconductor company that designs IoT chips and embedded software for developers."}],"similar_scored":564,"customers":null,"as_of":"2026-11-04","updated_at":"2026-11-04","hash":"e9c6a709660047ca","index_tier":1}