{"source":"Breaknorm","page":"https://breaknorm.co/company/syntacore.com","license":"https://breaknorm.co/terms","domain":"syntacore.com","name":"Syntacore","legal_name":"Syntacore","country":"US","country_second":"GB","city":"","admin1":"","vertical":"manufacturing_industry","subvertical":"electronics_and_electrical_manufacturing","leaf":"semiconductor_manufacturers","summary":"Syntacore is a service provider that develops RISC-V processor IP and tools for businesses and enterprises. It offers ten customizable, silicon-proven RISC-V cores (SCR1, SCR3, SCR4, SCR5, SCR6, SCR7, SCR9) and software packages including bootloaders, runtimes, and an FPGA SDK. Its solutions span IoT, industrial automation, storage, embedded, telecom, AI and ML, enterprise, PC and laptops, and networking.","offerings":["RISC-V cores","development tools","software packages","bootloaders and runtimes","FPGA SDK"],"target_customers":["IoT","industrial automation","storage systems","embedded applications","telecom","AI and ML","enterprise","PC and laptops","networking","embedded systems","ai and machine learning"],"business_model":["B2B"],"geo_scope":"international","headcount":"51-200","headcount_source":"linkedin","revenue":"10M-50M","revenue_source":"estimated","certifications":[],"langs":["en"],"linkedin":"https://www.linkedin.com/company/syntacore","reviews":[],"contact_points":1,"contact_phones":0,"page_types":["home","about"],"crawled":"2026-09-06","profiled":"2026-09-12","indexed":"2026-09-18","hiring_built":"2026-11-02","website_tech":["unisender","yandex_webmaster"],"hiring":{"open":8,"open_postings":8,"new_7d":0,"new_30d":0,"new_90d":0,"closed_30d":0,"countries":[]},"hiring_functions":[["engineering_non_software",6,0]],"tech_jobs":[{"slug":"systemverilog","status":"active","confidence":"medium","jobs":7,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Excellent SystemVerilog knowledge","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"verilog","status":"active","confidence":"medium","jobs":5,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Develop and maintain Verilog RTL logic blocks for communications systems’ baseband","title":"Senior DSP Designer/Architect"},{"slug":"linux","status":"active","confidence":"medium","jobs":4,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Advanced Linux user","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"python","status":"active","confidence":"medium","jobs":4,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Experience with scripting languages (perl/python/tcl/shell)","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"axi","status":"active","confidence":"medium","jobs":3,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Competency in OVM/UVM, SoC interfaces (AXI, AHB, OCP), cocotb","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"git","status":"active","confidence":"medium","jobs":3,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"C, Assembler, Linux, MCU, Microprocessors, CPU, Processors, Git, RTOS, Embedded Systems, Software Development, Validation, Verification, SystemVerilog, make, cmake, gcc, llvm, gas, ld, gdb, conan, debug, fpga, simulation","title":"Technical Lead/Senior RTL Verification Engineer (CPU)"},{"slug":"oracle-hcm-data-loader","status":"active","confidence":"medium","jobs":3,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"Verilog, HDL, CPU, DSP, RTL, SystemVerilog, ASIC Microarchitecture","title":"Senior DSP Designer/Architect"},{"slug":"perl","status":"active","confidence":"medium","jobs":3,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Experience with scripting languages (perl/python/tcl/shell)","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"amba-ahb","status":"active","confidence":"medium","jobs":2,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Competency in OVM/UVM, SoC interfaces (AXI, AHB, OCP), cocotb","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"cocotb","status":"active","confidence":"medium","jobs":2,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Competency in OVM/UVM, SoC interfaces (AXI, AHB, OCP), cocotb","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"jira","status":"active","confidence":"medium","jobs":2,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"Matlab, SystemVerilog, HDL, FPGA, C/C++, Assembler, Redmine, Jira, Git","title":"Technical Lead for Wireless IP"},{"slug":"tcl","status":"active","confidence":"medium","jobs":2,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Scripting languages (TCL, Python, Shell etc.)","title":"Senior DSP Designer/Architect"},{"slug":"uvm","status":"active","confidence":"medium","jobs":2,"first_seen":"2026-10-28","function":"engineering_non_software","quote":"• Excellent working knowledge of UVM","title":"Senior RTL Verification Engineer (DSP)"},{"slug":"c","status":"active","confidence":"medium","jobs":1,"first_seen":"2026-10-28","function":"","quote":"C, Assembler, Linux, MCU, Microprocessors, CPU, Processors, Git, RTOS, Embedded Systems, Software Development, Validation, Verification, SystemVerilog, make, cmake, gcc, llvm, gas, ld, gdb, conan, debug, fpga, simulation","title":"Technical Lead/Senior RTL Verification Engineer (CPU)"}],"intents":[],"recent_postings":[{"id":10905039,"title":"FAE, Semiconductor IP","city":"","function":"","family":null,"seniority":"mid","posted":"2026-10-28","url":"https://syntacore.com/company/careers/fae-apac","tech":[]},{"id":10905038,"title":"Technical Lead for Wireless IP","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/technical-lead-for-wireless-ip","tech":["systemverilog","c-plus-plus","matlab","oracle-hcm-data-loader","redmine","jira"]},{"id":10905037,"title":"Technical Lead/Senior RTL Verification Engineer (CPU)","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/technical-lead-senior-rtl-verification-engineer-cpu","tech":["linux","python","tcl","perl","c","git"]},{"id":10905036,"title":"Senior RTL Verification Engineer (DSP)","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/senior-rtl-verification-engineer-dsp","tech":["uvm","systemverilog","perl","python","linux","axi"]},{"id":10905035,"title":"Senior RTL Verification Engineer","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/senior-rtl-verification-engineer","tech":["uvm","systemverilog","perl","python","linux","axi"]},{"id":10905034,"title":"Senior DSP Designer/Architect","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/senior-dsp-designer-architect","tech":["verilog","systemverilog","tcl","python","unix-shell","oracle-hcm-data-loader"]},{"id":10905033,"title":"Senior MCU Designer/Architect","city":"","function":"","family":null,"seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/senior-mcu-designer-architect","tech":["verilog","systemverilog","oracle-hcm-data-loader"]},{"id":10905032,"title":"Senior CPU Designer/Architect","city":"","function":"engineering_non_software","family":"engineering_non_software/electronics_and_hardware_engineering","seniority":"senior","posted":"2026-10-28","url":"https://syntacore.com/company/careers/senior-cpu-designer-architect","tech":["verilog","systemverilog"]}],"ats":"Ownsite_html","similar":[{"domain":"sifive.com","name":"SiFive","country":"US","city":"San Mateo","headcount":"501-1000","leaf":"semiconductor_manufacturers","summary":"SiFive is a semiconductor company that designs RISC-V core IP and system IP for AI, ML, automotive, edge computing, IoT, embedded, datacenter, consumer devices,."},{"domain":"innatera.com","name":"Innatera","country":"NL","city":"Rijswijk","headcount":"51-200","leaf":"semiconductor_manufacturers","summary":"Innatera is a semiconductor company that develops neuromorphic chips and edge AI computing for real-world devices."},{"domain":"ethercoretech.com","name":"EtherCoreTech","country":"CN","city":null,"headcount":"51-200","leaf":"blockchain_and_web3_infrastructure","summary":"EtherCoreTech is a technology company that develops trusted computing platforms, blockchain core engines and RISC-V execution VMs for defense, finance and indus."},{"domain":"hsq.com","name":"HSQ Technology","country":"US","city":"Hayward","headcount":"51-200","leaf":"automation_integrators","summary":"HSQ Technology is a manufacturer, systems integrator and contractor that provides SCADA integration, monitoring and control technology for critical infrastructu."},{"domain":"sysgo.com","name":"SYSGO","country":"DE","city":"Klein-Winternheim","headcount":"51-200","leaf":"defence_systems_manufacturers","summary":"SYSGO is a European manufacturer of embedded operating systems that develops safety- and security-critical software for avionics, space, automotive, rail, defen."},{"domain":"amd.com","name":"AMD","country":"GB","city":"East Markham","headcount":"10001+","leaf":"semiconductor_manufacturers","summary":"AMD is a semiconductor and AI technology company that develops and sells CPU, GPU, and adaptive computing solutions for data centers, edge, and AI PCs."}],"similar_scored":591,"customers":null,"as_of":"2026-11-03","updated_at":"2026-11-03","hash":"e91d0f9e061ec7e0","index_tier":1}